1. Field of the Invention
The present invention relates to serial communications, and more particularly, to a method and apparatus for serial communication using clock-embedded signals.
2. Description of the Related Art
High-definition video may be transmitted between electronic devices such as a digital television, personal computers, monitors, etc. through international interface standards such as the Unified Display Interface (“UDI”) led by the European CE (Conformite Europeenne) companies and the Display Port led by leading PC and consumer electronics companies.
The UDI is an expansion of the High-Definition Multimedia Interface (“HDMI”) accepted as an industrial standard in the field of large screen digital televisions above 30 inches. The Display Port is a new interface standard having a maximum bandwidth of 10.8 Gbps, which is more than twice the existing Digital Visual Interface (“DVI”) having a bandwidth of 4.95 Gbps.
Other signaling protocols, such as low-voltage differential signaling (“LVDS”), DVI, HDMI, reduced swing differential signaling (“RSDS”), mini-LVDS, point-to-point differential signaling (“PPDS”), and external protocol employ a dedicated channel for clock transmission. The embedded protocol of the UDI and the Display Port use a signaling scheme in which clock information is embedded in the data stream using 8B/10B coding of the American National Standards Institute (“ANSI”).
Conventional techniques using separate wiring for the clock channel may increase electromagnetic interference. On the other hand, embedding clock information in the data stream requires that 8-bit data be converted into 10-bit data, thereby incurring a 2-bit overhead during 8-bit data transmission.